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sclog: support AArch64 division and shift instructions.
These need to be logged for the same reasons as on x86.
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parent
f65153ab5b
commit
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@ -415,6 +415,19 @@ static dr_emit_flags_t instrument_instr(
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OPND_CREATE_INTPTR(loc));
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break;
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#endif
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#if defined(AARCH64)
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case OP_sdiv:
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case OP_udiv:
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/*
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* AArch64 hardware divisions. 0 = numerator, 1 = denominator.
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*/
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instr_format_location(instr, &loc);
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dr_insert_clean_call(
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drcontext, bb, instr, (void *)log_div, false,
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3, instr_get_src(instr, 0), instr_get_src(instr, 1),
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OPND_CREATE_INTPTR(loc));
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break;
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#endif
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#if defined(X86)
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case OP_shl:
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case OP_shr:
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@ -448,6 +461,26 @@ static dr_emit_flags_t instrument_instr(
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}
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break;
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}
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#endif
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#if defined(AARCH64)
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case OP_lslv:
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case OP_asrv:
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case OP_lsrv:
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case OP_rorv: {
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/*
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* AArch64 variable shift instructions.
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*/
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opnd_t shiftcount = instr_get_src(instr, 1);
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DR_ASSERT(opnd_is_reg(shiftcount));
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reg_id_t shiftreg = opnd_get_reg(shiftcount);
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if (shiftreg >= DR_REG_W0 && shiftreg <= DR_REG_WSP)
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shiftreg = reg_32_to_64(shiftreg);
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instr_format_location(instr, &loc);
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dr_insert_clean_call(
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drcontext, bb, instr, (void *)log_var_shift, false,
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2, opnd_create_reg(shiftreg), OPND_CREATE_INTPTR(loc));
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break;
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}
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#endif
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}
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